ASIC RTL Design and Automation Engineer, University Graduate
Company: Google
Location: Sunnyvale
Posted on: April 2, 2026
|
|
|
Job Description:
Minimum qualifications: PhD in Electrical Engineering, Computer
Engineering, Computer Science, a related field, or equivalent
practical experience. Experience in any one domain of silicon
engineering through internships, academic research, or publications
(e.g., digital design basics, including synchronous and
asynchronous logic, state machines, or bus protocols). Experience
in a scripting language such as Python or Perl. Experience in
Verilog or SystemVerilog. Preferred qualifications: Experience with
creating digital designs, including synchronous and asynchronous
logic, state machines, and bus protocols. Experience developing
scripts or tooling for design automation. Experience optimizing
designs for performance, power or area. About the job In this role,
you’ll work to shape the future of AI/ML hardware acceleration. You
will have an opportunity to drive cutting-edge TPU (Tensor
Processing Unit) technology that powers Google's most demanding
AI/ML applications. You’ll be part of a team that pushes
boundaries, developing custom silicon solutions that power the
future of Google's TPU. You'll contribute to the innovation behind
products loved by millions worldwide, and leverage your design and
verification expertise to verify complex digital designs, with a
specific focus on TPU architecture and its integration within
AI/ML-driven systems. Our computational challenges are so big,
complex and unique we can't just purchase off-the-shelf hardware,
we've got to make it ourselves. Our team designs and builds the
hardware, software and networking technologies that power many
Google's services. As an ASIC Design Engineer, you will be part of
a team developing ASICs used to accelerate computation in data
centers. You will have dynamic, multi-faceted responsibilities in
areas such as project definition, design, and implementation. You
will participate in the design, architecture, documentation, and
implementation of the next generation of data center accelerator.
The AI and Infrastructure team is redefining what’s possible. We
empower Google customers with breakthrough capabilities and
insights by delivering AI and Infrastructure at unparalleled scale,
efficiency, reliability and velocity. Our customers include
Googlers, Google Cloud customers, and billions of Google users
worldwide. We're the driving force behind Google's groundbreaking
innovations, empowering the development of our cutting-edge AI
models, delivering unparalleled computing power to global services,
and providing the essential platforms that enable developers to
build the future. From software to hardware our teams are shaping
the future of world-leading hyperscale computing, with key teams
working on the development of our TPUs, Vertex AI for Google Cloud,
Google Global Networking, Data Center operations, systems research,
and much more. The US base salary range for this full-time position
is $138,000-$198,000 bonus equity benefits. Our salary ranges are
determined by role, level, and location. Within the range,
individual pay is determined by work location and additional
factors, including job-related skills, experience, and relevant
education or training. Your recruiter can share more about the
specific salary range for your preferred location during the hiring
process. Please note that the compensation details listed in US
role postings reflect the base salary only, and do not include
bonus, equity, or benefits. Learn more about benefits at Google .
Responsibilities Develop SystemVerilog RTL to implement logic for
ASIC products. Create and review design microarchitecture
specifications. Develop methodology and tooling for design
automation. Work with Design Validation (DV) teams to create test
plans to verify, and debug design RTL. Work with Physical Design
teams to ensure design meets physical requirements and timing
closure.
Keywords: Google, Vallejo , ASIC RTL Design and Automation Engineer, University Graduate, Education / Teaching , Sunnyvale, California